COMPUTER ARCHITECTURE AND LABORATORY
Academic year and teacher
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- Versione italiana
- Academic year
- 2015/2016
- Teacher
- FRANCESCO GIACOMINI
- Credits
- 10
- Didactic period
- Secondo Semestre
- SSD
- INF/01
Training objectives
- The primary objective of the course is the understanding of the fundamental elements that constitute a modern computing system and how those elements could influence the performance of the system.
The main acquired knowledge at the end of the course includes:
* Binary representation of information (instructions and data)
* Instruction Set Architecture (ISA) and Assembly language
* Combinatorial and sequential logic
* Datapath and pipeline
* Memory hierarchy and caches
The MIPS architecture is used to describe the above concepts.
The main acquired abilities at the end of the course include:
* Converting integer and floating-point numbers between different bases
* Representing integer and floating-point numbers and characters in the most widely used binary formats
* Programming in Assembly MIPS
* Designing simple logical circuits
* Analyzing the behaviour of fragments of assembly code executed on a MIPS datapath
* Analyzing the memory accesses in presence of multiple types of caches Prerequisites
- In order to follow proficiently the course, the following abilities are requested:
* Familiarity with elementary arithmetic
* Basic programming in the C language Course programme
- The course foresees 80 hours of teaching, divided between lessons (about 50 hours) and lab activity (about 30 hours).
= Binary representation of information (8 hours)
Positional numerical system - Conversion between bases - Binary representation - Logical and arithmetical operations on binary numbers - The "2's complement" format for integer numbers - The "IEEE 754" format for real numbers - The "ASCII" format for characters - Binary representation for MIPS instructions.
= Instruction Set Architecture and assembly language (8 hours)
The Von Neumann architecture - Main MIPS instructions - Memory layout of a process - Stack and stack frame - Correspondence between C language constructs and assembly MIPS
= Combinatorial and sequential logic (8 hours)
Boole Algebra - Logical functions and truth tables - Logica gates - Programmable Logic Array - Exemples of logical blocks (multiplexer, decoder, ALU) - Clock - Flip-flop - Registers and register file - SRAM and DRAM
= Datapath (6 ore)
Stages in the execution of an instruction - Construction of a simplified MIPS datapath - Control logic
= Pipeline (10 ore)
Performance - Instruction pipelining - Hazards - Solutions and mitigations for hazards - Speculation - Other mechanisms for Instruction Level Parallelism
= Memory hierarchy and caches (10 ore)
Memory hierarchy - Locality principle - Hit and miss - Direct-mapped caches - Associative caches - Multiple-level caches Didactic methods
- The lessons are supported by a digital presentation, with some parts developed at the whiteboard.
The lab activity includes the development of programs written in C language or in MIPS assembly that implement the concepts presented during the lessons. The student can use his or her own laptop. Learning assessment procedures
- The exam consists of a written part, an oral part and lab exercises.
The written and oral parts weigh for 25/30 on the final mark. The remaining contribution of 5/30 is given by the lab exercises.
The written part is mandatory and covers all the course arguments. It includes both questions of theoretical type, that require a reasoned answer, and practical exercises. During the course period there is also the possibility to take two partial tests, which together constitute one full written test.
The oral part is optional, but in order to take it, the result of the written part must be sufficient. The oral test covers all the course arguments and can include both theoretical questions and practical exercises.
The lab exercises are assigned during the course period and shall be executed autonomously and delivered at least two weeks before the oral test or the registration of the mark. The exercises can also be done in small groups. Reference texts
- The reference textbook is
Computer Organization and Design - The Hardware/Software Interface
D. Patterson, J. Hennessy
5th Edition, Elsevier, 2013
ISBN 978-0-12-407726-3
An Italian translation is also available
Struttura e Progetto dei Calcolatori
D. Patterson, J. Hennessy
4a edizione italiana, condotta sulla 5a edizione americana
Zanichelli, 2015
ISBN 978-88-08-35202-6
At the end of each lesson the material used during the lesson is made available, as a presentation in pdf format.
