COMPUTER ARCHITECTURE AND LABORATORY
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- Versione italiana
- Academic year
- 2022/2023
- Teacher
- DAVIDE BERTOZZI
- Credits
- 10
- Didactic period
- Secondo Semestre
- SSD
- INF/01
Training objectives
- The primary learning objective of the course is the understanding of the fundamentals of modern computer architecture organization and design, as well as of the key optimization techniques of global performance.
Acquired knowledge at the end of the course will revolve around the hardware/software interface of computer architectures, and will include:
* Binary representation of information (instruction and data)
* Computer arithmetic (for integers as well as for floating point numbers)
* Combinational Logic and Sequential Logic
* The von Neumann machine
* Instruction Set Architecture and Assembly Language
* Micro-architectural design principles (control path and datapath)
* Performance optimization techniques in modern microprocessor architectures
* Memory hierarchy and virtual memory
The above concepts will be illustrated by means of concrete examples from the Instruction Set Architecture of the MIPS processor.
The key abilities that the students will gain include:
* Converting integer and floating point numbers across several bases.
* Representation of numbers and characters through the most common binary formats
* Programming in Assembly Language for the MIPS Instruction Set Architecture
* Synthesis of simple combinational logic functions
* Synthesis of simple finite state machines
* Use of standard combinational blocks (especially arithmetic modules) to build computing architectures
* Understanding of the benefits and limitations of a von Neumann machine
* Understanding static memory allocation based on the principle of natural alignment
* Designing the datapath and the control path of a simple micro-architecture
* Optimizing performance of a micro-architecture by means of advanced techniques such as pipelining, multiple execution paths or instruction scheduling
* Detecting data hazards in Assembly code fragments
* Understanding static and dynamic branch prediction techniques in modern microprocessors
* Analyzing the behaviour of C or Assembly code fragments on the datapath of a micro-architecture.
* Assessing the cost-benefit trade-offs for differet kinds of cache architectures
* Understanding the management overhead of a virtual memory system Prerequisites
- In order to follow proficiently the course, the following abilities are requested:
- Familiarity with basic arithmetic algorithms;
- Basic C programming skills. Course programme
- - Overview of several computing fields and projection of major trends.
- Binary representation of information.
- Basic logic operators and gates
- Boolean Algebra
- Combinational logic and sequential logic
- Synthesis through Karnaugh maps
- Standard combinational components
- Components for binary arithmetics
- Arithmetic and Logic Unit, multipliers
- Model of the von Neumann machine
- Instruction Set Architecture of the MIPS processor.
- Assembly language for MIPS and associated Lab. exercises.
- Handling procedure calls
- Data alignment in memory and processor endianess
- Computer arithmetic for integers.
- Computer arithmetic for floating point numbers based on the IEEE 754 standard.
- Datapath design fundamentals.
- Assembly instruction mapping on the datapath.
- Control path of a microarchitecture: design principles.
- Performance optimization technique: pipelining.
- Data hazard: definition, detection, solutions.
- Forwarding units and hazard detection units.
- Control hazards and related techniques
- Static branch prediction techniques.
- Dynamic and hybrid branch prediction techniques.
- Architectures with in-order instruction scheduling.
- Reorder buffer and register renaming
- Brief notes on architectures with out-of-order instruction scheduling.
- Memory hierarchy: cache memory and scratchpad memory.
- Cache architectures: direct mapping, associativity
- Virtual memory. Didactic methods
- The course is structured as follows:
- Lectures covering all course topics and accouting for roughly 60% of the total course hours. The teaching method is based on the projection of slides that will be made available for download at least the night before the lecture day.
- Guided Lab exercises in the Informatics Lab, aiming at the development of a threefold ability in the students:
(a) ability to work out the algorithmic steps that process an input specification to achieve the computational goals that lead to the solution of assigned problems.
(b) ability to code such algorithmic steps into a programming language that is very close to the abstraction layer of the underlying computing platform (Assembly Language).
(c) ability to translate C code fragments into a matching Assembly representation, while optimizing the use of resources and the processing time and meeting the programming conventions of the ISA at hand.
Lab activities account for roughly 40% of the total course hours.
It will be possible to install the software used in the Lab activities directly on students' laptops, in order to maximize the opportunities for developing the programming skills.
COVID EMERGENCY
At the moment the course is held through face-to-face lectures according to the course schedule.
Pre-recorded lectures covering the course program are made available through free blended learning platforms. Learning assessment procedures
- The exam consists of two parts:
- Lab tests, which contribute from 1 to 5 points to the final mark.
- Written exam, which contributes from 15 (sufficient) to 25 (excellent exam) points to the final mark.
A student is entitled to be assigned an overall final mark when both tests have been successfully passed. The final mark is given by the sum of the points gained in the two parts of the exam, and is subject to the requirement that such sum should be higher than 18 to pass the exam.
A) Lab test.
The Lab test aims at verifying to what extent the ability to translate C code fragments into a matching Assembly representation has been gained. The test is passed when the achieved score is larger than 1.
B) Written Exam.
The written exam consists of open questions and enables to assess the students' ability to expose course topics in an appropriate, concise and logically-rigorous way. Questions tentatively cover all course topics, and consist of both basic questions on fundamental principles of computer architecture organization and design as well as on more detailed questions on selected course topics. The written exam also includes one exercise that covers the applicative aspects of the course, in particular the synthesis of logic functions through the method of Karnaugh maps.
The written exam is passed if at least 15 points out of 25 are gained, and contributes a maximum of 25 points to the final mark.
The sum of the maximum points gained in the Lab test (5) and in the written exam (25) is equivalent to an overall mark of 30 (possibly CUM LAUDE). However, the minimum vale of such sum should be larger or equal to 18 to pass the exam.
The two parts of the exam do not have logic and timing dependency constraints, in the sense that the Lab test can be given before or after the written exam, or vice versa. Should students be unsatisfied with the outcome of their Lab test or of the written exam or of both of them, they are allowed to selectively re-try them. However, when the intention to repeat one or both tests is officially expressed by the student, the outcome of the old one(s) gets automatically discarded regardless of the outcome of the new test(s). Reference texts
- The reference books of the course are as follows.
For the Instruction Set Architecture and for Microarchitectures:
Computer Organization and Design - The Hardware/Software Interface
D. Patterson, J. Hennessy
5th Edition, Elsevier, 2013
ISBN 978-0-12-407726-3
(addressing the MIPS Instruction Set Architecture)
for which italian translations do exist, such as:
Struttura e Progetto dei Calcolatori
D. Patterson, J. Hennessy
4a edizione italiana,
Zanichelli, 2015
(addressing the MIPS Instruction Set Architecture)
For combinational and sequential logic:
Elementi di Progettazione dei Sistemi VLSI - Volume I: Introduzione all'Elettronica Digitale.
Autore: Mauro Olivieri.
EdiSES 2004.
(in italian only)
Projected slides in each lecture as well as specifications for Lab activities can be downloaded from a dedicated Google Classroom that will be set up for each course edition. Pre-recorded lectures covering all topics of the course program are also made available on the Google Classroom.
